On a single-ended data bus, or I/O (input-output bus), when a majority of the data signals on the bus switch to HIGH from LOW, or to LOW from HIGH, there may be an accompanying noise spike on the voltage supply lines and the ground lines. This may adversely affect power supply integrity, as well as signal integrity. For example, if all the data bits on a bus were to switch from HIGH to LOW, the on-chip ground rail voltage and power rail voltage may bounce up due to the combination of the capacitance between the rails and the inductances in the leads.
The above-described rail and ground bounce is substantially mitigated by using differential signaling. However, this requires twice as many pins, and a data bus twice as wide, as for the case of using single-ended signaling. It is desirable to mitigate noises spikes on the power and ground rails when signaling over an I/O bus without resorting to differential signaling.